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[Moved] verilog code for LZ78 algorithm

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Ashok_Pacha

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Hi sir, Im having problem in writting verilog code for LZ78 algorithm. Plz help me. here with im attaching algorithm of lz78 data compression.


Code Verilog - [expand]
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Dictionary = empty ; Prefix = empty ; DictionaryIndex  = 1;
while(characterStream is not empty)
{
    Char = next character in characterStream;
      if(Prefix + Char exists in the Dictionary)
             Prefix = Prefix + Char ;
       else
        {
               if(Prefix is empty)
                     CodeWordForPrefix  = 0 ;
              else
                     CodeWordForPrefix = DictionaryIndex for Prefix ;
               Output: (CodeWordForPrefix, Char) ;
             insertInDictionary( ( DictionaryIndex , Prefix + Char) );
             DictionaryIndex++ ;
             Prefix = empty ;
      }
}
if(Prefix is not empty)
{
    CodeWordForPrefix = DictionaryIndex for Prefix;
     Output: (CodeWordForPrefix ,   ) ;
}

 
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What languge is this written in? It looks more like pseudo code.

Besides that if you want to code this algorithm in Verilog first understand the hardware you want i.e. number of pipeline stages, and architecture of the design. If you have that anyone who can write synthesizable Verilog could code it.
 

mrflibble

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That's indeed pseude code copy/pasted from one of many possible locations.
 

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