[Moved] Static Noise Margin Simulation for Ternary SRAM

Status
Not open for further replies.

Siddharthpethe

Newbie level 1
Joined
May 14, 2015
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
5
Hello,
I am trying to simulate Ternary SRAM cell. which can memorize logic 0,1,2 or in vtg level as 0v,1.5v,3v. I want to find simulation result for SNM of the ternary SRAM.

Please help.




SRAM cell SCHEMATIC

Thanks in advance.
regards,
Siddharth
 
Last edited by a moderator:

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…