csrlin
Newbie level 1

We do a simulation of an inverter with nfin=1 and nfin=7 based on PTM 14nm FinFET LSTP model using HSPICE Version H-2013.03-SP2 32-BIT, respectively. The results we got were the same. We tried so many ways to figure this out, but never succeeded. Could anyone help us to figure this out? Many thanks.
Rung-Bin
Rung-Bin