Below is a problem I had while reading about frequency compensation in
Allen and Holberg - CMOS Analog Circuit Design (page 264).
Could you explain how the author used the assumption that Rz is less than RI and RII and poles are widely spaced to get these roots?
I think in a way that if Rz is more the output resistances of amplifies 1 and 2 will get effected causes there is unwanted results in pole shifting. But analysing above equations is somewhat difficult, i think better to analyse by the operations way.