waelalarwe
Newbie
Design Problem: Design a Fully Differential version of Two Stage CMOS
op-amp with the following specifications:
No. Specifications Value
1 Technology tsmcmm018
2 Supply (Vdd) 3.3V
3 Load Capacitance (CL) 1pF (differential)
4 Power Budget (PD) < = 2.5mW
5 Differential DC gain (Av) > = 95 dB
6 Small signal BW (UGB) > = 130 MHz
7 Phase Margin (PM) > = 55 Degree
8 Output Swing >= 5V (Differential)
9 CMRR >= 125dB
10 PSRR >= 125 dB
11 Linear range of operation >= 1.5 V
op-amp with the following specifications:
No. Specifications Value
1 Technology tsmcmm018
2 Supply (Vdd) 3.3V
3 Load Capacitance (CL) 1pF (differential)
4 Power Budget (PD) < = 2.5mW
5 Differential DC gain (Av) > = 95 dB
6 Small signal BW (UGB) > = 130 MHz
7 Phase Margin (PM) > = 55 Degree
8 Output Swing >= 5V (Differential)
9 CMRR >= 125dB
10 PSRR >= 125 dB
11 Linear range of operation >= 1.5 V