I have been doing RTL synthesis for given ARM Core M0. I have done synthesis in single Vt and now doing ECO in cadence tempus using Mix-Vt. But I am getting warning/error as shown in given picture. Could you please tell what is missing or exact problem occurring? Please tell me ASAP!!
You company system admin (or one who is responsible for installing and maintaining the Cadence tools) might be able to give you some solutions.
But you might want to try out once by running this synth task by submitting the job to a high performance machine.
You company system admin (or one who is responsible for installing and maintaining the Cadence tools) might be able to give you some solutions.
But you might want to try out once by running this synth task by submitting the job to a high performance machine.
Thank you so much for your response but I tried running same script on ARM core M3. It didn't gave this error. Core M3 RTL was much more complicated than this RTL. This M0 RTL is simpler than M3, still it is giving error.
Thank you so much for your response but I tried running same script on ARM core M3. It didn't gave this error. Core M3 RTL was much more complicated than this RTL. This M0 RTL is simpler than M3, still it is giving error.
the tool decides to parallelize the jobs based on circuit size. your error message implies the synthesis is being distributed to multiple servers but one is not responsive.
Thank you so much for your response but I tried running same script on ARM core M3. It didn't gave this error. Core M3 RTL was much more complicated than this RTL. This M0 RTL is simpler than M3, still it is giving error.