"Back in the day" +/-10V ADC chip sets used the CMP-05
with +5/-15V supplies, so no problem.
Today the input voltage may be differential (and too, the
rest of the signal lineup until the logic). Then while quantity
is negative, common mode range is still within spec.
You can make level shifting front ends, and you can (with
appropriate technology) make a (mostly) 0-5V design deal
with negative voltages.
For any decent bit-width, the comparison of interest is
trivially negative (what's your input range divided by
2^N?). You only need accuracy about the LSB point,
so maybe (say) -1mV on a 4.096V in, 12 bit ADC. As
long as there's no phase inversion, larger negative
inputs still compare right and accuracy is a don't-care.