MOSFET region of operation in switching regulator

[analog_match]

mosfet region of operation

When a power MOSFET is used as a switch in switching application is it in linear (triode) region when it is on? I think this is so and it is unlike using a transistor as an amplifier in which case we want it to be in saturation correct? I just want to confirm that I understand the region of operation correctly for FETS is a switching regulator?
Thanks

 

[eem2am]

when fet switch on in smps it goes up then along then up....in say 100ns

see any app note on mosfets to get this

 

[analog_match]

You are talking about the miller voltage seen on the gate where voltage levels out when the Cgd is getting charged correct?

But once the FET is finally ON will it be in saturation or triode. I am thinking triode.

If it is in triode Vds is smaller compared to if it is in saturation but losses will be more correct?

 

[eem2am]

i dont know what you mean "triode"

It comes on........going bit through linear region , then its in saturation.

"yes" about cgd charging miller cap etc

 

[FvM]

There's obviously a misunderstanding of technical terms. In MOS literature, triode region is defined by the boundary condition VDS ≤ VGS - VTH, while in saturation (or in traditional vacuum electronics terms pentode) region VDS > VGS - VTH applies.

The region near the origin with resistive VDS versus ID behaviour is also named deep triode region. Of course, the latter should be reached in switch on-state. So far regarding definition of terms.

I guess, that part of the confusion comes from the fact, that a BJT power switch is usually operated in saturated (IB > IBmin) mode, not related to saturation of MOSFETs anyhow.

But apart from the meaning of terms, it's clear that static switch losses can be only minimized by reducing VDS at a given ID. You don't need a region definition from MOSFET theory to understand this simple fact.