no feasible entries for infix operator +.
I have passed the 'syntax check' section in ISE7.1 When I simulate it in ModelSim, I had a lots Errors;
1. Identifier "signed" is not directly visible. I have added these following libraries
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.numeric_bit.all;
use IEEE.numeric_std.all;
--use IEEE.numeric_std.signed;
library UNISIM;
use UNISIM.VComponents.all;
I heard ieee.std_logic_arith and numeric_std all have 'SINGED' function. Even though I remove one of them, it doesn't work either;
2.where non-array type (error) was expected.
variable ones : signed(15 downto 0) := "0000000000000001";
I don't what is wrong with it?
3.Incompatible types for variable assignment.
d2Rkk:="00000000000000000000000000000000"; (variable d2Rkk :signed(31 downto 0)
4.OTHERS choice can not be used in unconstrained array aggregate and Indexed name is type (error); expecting type bit.
tmpR :=(others=>signiptdoutb(15)); ps:variable tmpR :signed(31 downto 0);
5.No feasible entries for infix operator "-".
tmpb :=tmpb-tmpR; ps: variable tmpb :signed(31 downto 0);
6.No feasible entries for infix operator "+".
tmpb :=tmpb+tmpR;
7.Type error resolving infix expression "=" as type boolean.
if signthtdoutb(31) = '0' then.... type of signthtdoutb is 'signed'
8. Bad right hand side (infix expression) in variable assignment.
9.Type error resolving infix expression "or" as type std_logic.
overflow <=((not signhdoutb(15)) and (not signthtdoutb(31)) and (tmph(15))) or ((signhdoutb(15)) and (signthtdoutb(31)) and (not tmph(15)));
I am sorry to bring many problems here. I am totally mad about this. I have google some but cannot get the answers. Any help from you is very appreciated. Thank you very much.
Zhi