# Start all fresh and clean
if [file exists work] {vdel -lib work -all;vlib work} else {vlib work}
# some sv packages
vlog ../rtl/pkg1.sv
vlog sim_pkg2.sv
# Design files
vcom ../../rtl/vhdl1.vhd
vcom -2008 ../rtl/vhdl2.vhd
vlog ../rtl/verilog1.sv
vlog ../rtl/verilog2.sv
# testbench
vlog ../tb/testbench.sv
# fw core repo simulation models
vlog ../sim/model1/bus_model1.v
vlog ../sim/model2/bus_model2.sv
# simulation tasks
vlog simulation_tasks.sv
# simulation testcase
vlog testcase.sv