anonymous.
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I'm am trying to simulate some VHDL codes that use Synopsys Design Ware components in modelsim.
I added the Design ware vhdl files to a directory called DWARE in my work directory. I have successfully compiled some files(they include DWARE). but there is onlyone file that produces the error. All files are in the same directory (They can all see DWARE folder and the libs inside) and they all work fine except for this one.
the exact error is :
Is there any possible explanation for this wierd behavior ?
I added the Design ware vhdl files to a directory called DWARE in my work directory. I have successfully compiled some files(they include DWARE). but there is onlyone file that produces the error. All files are in the same directory (They can all see DWARE folder and the libs inside) and they all work fine except for this one.
the exact error is :
Code:
** Error: /home/***/DCache/DCache_ReorderBuffer.vhd(2): Library dware not found.Is there any possible explanation for this wierd behavior ?
