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Modeling DLL(Delay locked loop) in Simulink

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Hi everyone,

For my master's thesis i need to do system level modeling of DLL in simulink to calculate jitter. Later on design has to be done in cadence.
I could not find any reference to implement DLL in simulink. I am stuck with modeling of VCDL(voltage control delay line). Please guide me.

thanks a lot!
 

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