... I understood everything except the concept of finding the Early Voltage VA3,VA4 through equation 1!
From design specifications we know the overall gain Av(dB)> 80, not Av1.
How do we know and calculate Av1 dc gain?
"considering the DC gain spec, L1 and VA1, the current mirror VA3 can be obtained through equation 1 → VA3 = VA4 = 10.2;"
is wrong: Like VA1 = VA2 (s. item above the a.m. statement), VA3 = VA4 = 10.2 is obtained from the gm/Id vs. VA curves (with L as parameter, s. item below the a.m. statement), not through equation 1 . Then, with all values introduced into this equation, Av1 can be calculated (Av1 ≈ 100 = 40dB), then similarily Av2 .
It's not the only error in this paper: M1-M2 is a PMOS differential pair, not an NMOS (p. 3), and L(M8 ) = 1 and not 1.5µm (p. 4).
gm/Id is already known. In the gm/Id vs. VA family of curves (L is the family parameter) a parallel line to the x-axis is drawn with the known ordinate value gm/Id. It meets the array of curves at several points which mean L-VA pairs. Now you can choose a convenient L-VA combination, e.g. 0.6µm - 10.2V for M3-M4 in this case, which will achieve a reasonable Av1 .
dtzounakos said:
At first statement, we choose L1=L2=3um and we find value VA1 and VA2 through plot VA=f(Gm/IDS)!
Yes; same method as mentioned above. The L-value is governed by considering the required GBW, as well as by noise & matching (means: offset) requirements. The chosen relatively high L=3µm value achieves an appropriately high VA1=VA2 value.
dtzounakos said:
At second statement, we don't know L3,L4 and VA3,VA4.
In order to estimate one value of these variables, we must prior know the other value!
That's true, but you can always choose between several L-VA pairs, s. above. Higher L-VA pair values result in larger gain & GBW, however need more real estate area.
That's another possibility. In this case, the VA value can be calculated, and the point of intersection between its value and the known Gm/IDS value on the VA=f(Gm/IDS) array of curves gives the L value.