albert22
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Hi,
I am trying to implement a DDS on a FPGA and I need a serial interface to program the registers associated with it.
For example the incremental phase and the start phase may take 2 x 48 bit registers or 12 x 8 bit registers. A second DDS will have more registers.
I found several VHDL implementations of SPI slaves. But they seem to handle only one register of configurable length.
Eventually I want to be able to update the waveform RAM of the DDS thru the same interface.
Can this be done with SPI or there is something else that I can use? Any ideas ?
Thanks
I am trying to implement a DDS on a FPGA and I need a serial interface to program the registers associated with it.
For example the incremental phase and the start phase may take 2 x 48 bit registers or 12 x 8 bit registers. A second DDS will have more registers.
I found several VHDL implementations of SPI slaves. But they seem to handle only one register of configurable length.
Eventually I want to be able to update the waveform RAM of the DDS thru the same interface.
Can this be done with SPI or there is something else that I can use? Any ideas ?
Thanks