Is it possible to make the microblaze use the DDR memory on the Spartan 3E starter Kit from Xilinx? I have attempted to use the OPB DDR controller and the MCH_OBP DDR controller by every time it fails. As a test I use the EDK-generated memory test.
Are there any particularly parameters that I have to pay extra attention to?
Try to make your first design minimal, no EMAC for example.
Then make sure the configuration jumpers (J30) are set for JTAG (0:1:0) and then power down and power up the board. It is a known bug that if the FPGA is already loaded with a design (the initial design for example) the iMPACT fails to correctly program your new design.
Then make sure the configuration jumpers (J30) are set for JTAG (0:1:0) and then power down and power up the board. It is a known bug that if the FPGA is already loaded with a design (the initial design for example) the iMPACT fails to correctly program your new design.