Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

method to size the PMOS and NMOS transistor (when Load andpropagation delay is given)

Status
Not open for further replies.

imperza

Junior Member level 3
Joined
Nov 20, 2012
Messages
28
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,463
Hi all,
I need explaination of method to size the PMOS and NMOS transistor (when Load and propagation delay is given).
Thanks.
 

BradtheRad

Super Moderator
Staff member
Joined
Apr 1, 2011
Messages
13,808
Helped
2,738
Reputation
5,473
Reaction score
2,648
Trophy points
1,393
Location
Minneapolis, Minnesota, USA
Activity points
103,059
The ampere load is one factor but what also matters is how the device will be used to control current. Will it provide resistive drop (linear mode)? Or will it serve as a switch?

The first case requires that it must dissipate more heat. In the second case it dissipates less heat.

Propagation delay enters into the equation when we consider how fast we want to switch the device. Suppose it opens and closes slowly in comparison to the speed of gate pulses. The result is that the device is in a state of transition for a greater percentage of time per cycle. It will dissipate more heat.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top