understand the physical and electrical significance of any layout structure
understand all the involved mechanisms of memory data write, conserve and read back, as well as provisions to sustain and read back data correctly (refreshing, rewriting)
understand the function of the analog read comparator and its temperature dependent readjustment
know your foundry's / fab's technology capabilities
understand the backend processes and be capable to cooperate with the backend guys
have ideas about using these process capabilities in order to save silicon area resp. improving the yield
know and understand your competitors' architectures and layouts
As per my knowledge technology node means it depends on the gate length of the transistor.Suppose i want to design a memory block in 22nm node, What points i want to consider.Any text books enriches these aspects with EDA tool examples.