For 8085 lower order address and data bus is multiplexed so for demultiplex the address and data bus we need Latch like 74LS373
we have to connect the latch to AD0-AD7 of 8085. there is an signal called ALE - Address Latch Enable as name suggest this signal will enable the latch for address. see the timing diagram ALE is present only in first clock cycle at that time AD0-AD7 acts as address bus after that from 2nd clock onwards ALE goes down and AD0-AD7 will be Data bus. we have to take out data bus before latch and address bus is available after the latch
1st clock outputs the address and ALE goes high so the address is available at latch's output then ALE goes low that means latch is disable but address is still available because latch holds the the output.
decoder is required for selecting chips in memory mapping. like if we use 2 to 4 decoder we have 4 combinations ie 00, 01, 10, 11. as input to the decoder and there will be 4 outputs only one is low at a time for particular input signal like 00 will select Y0 as low and other will be high. these will go to the CS - chip select pins of the devices
Note: read datasheet of 8085, 74LS373, 74LS139, 74LS245