Yeah I know about TTL's frequency. Ive seen that 74LVC can handle 250+MHz.
About PLD's I would have to buy development boards, learn to program it, etc. Too high cost for me now.
Thanks for help.
About PLD's I would have to buy development boards, learn to program it, etc. Too high cost for me now.
Yes.Logic design has become so easy now.
Yeah I know about TTL's frequency. Ive seen that 74LVC can handle 250+MHz.
About PLD's I would have to buy development boards, learn to program it, etc. Too high cost for me now.
Thanks for help.
Bad choice...74's are nearly obsolete in modern designs. FPGAs are used across many designs.Maybe in later time I'll give FPGA a try, but for now I think I will stick to 74's.
FPGA is not programmed like a microprocessor/microcontroller, it is done using logic design techniques.About FPGA only I knew was that it exists. Wasn't deep learning about it. That's why I don't know much about it. Programming it is done in C/asm same way as microcontrollers?
Sorry for late reply, but I was unable to get to PC.
Could you provide me maybe a schematic or something which shows how that parallel memory is realised? I've been looking at google but couldn't find anything. How to connect multiple memories to work as you've mentioned?
Do I undersood this correctly? You have for example 3 memories. Each of these contains n, n+1, n+2 sample number, respectively. So for 300MHz clock time each of these memories have to work at clock time of 100MHz. Then these samples are send to a PISO register which work at 300MHz clock.
Thanks in advance.
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