#define _XTAL_FREQ 8000000
#include <xc.h> // main header
#include "lcd.h" // lcd in 4 bit mode
// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
void adc_convert(void);
void System_init(void) {
TRISA = 0b00000001;
PORTA = 0b00000001;
CMCON = 0X07;
TRISB = 0b00000000;
PORTB = 0b00000000;
TRISC = 0b00000000;
PORTC = 0b00000000;
TRISD = 0b00000000;
PORTD = 0b00000000;
TRISE = 0X00;
PORTE = 0X00;
ADCON1 = 0b00001110; //VSS,VDD ref. AN0 analog only
ADCON0 = 0x00; //clear ADCON0 to select channel 0 (AN0)
ADCON2 = 0b10100001; //ADCON2 setup: Right justified, Tacq=8Tad, Tad=8*Tosc (or Fosc/8)
ADCON0bits.ADON = 0x01; //Enable A/D module
}
void main(void) {
System_init();
lcd_init();
lcd_clear();
lcd_goto(1, 1);
lcd_puts("ADC Test");
while (1) {
adc_convert();
__delay_ms(100);
__delay_ms(100);
}
}
void adc_convert(void) {
unsigned long int iv_temp1, iv_temp2, iv_temp3, iv_temp4, iv_temp5, iv_temp6, iv_temp7, input_voltage;
ADCON0bits.GO_DONE = 1; //Start A/D Conversion
while (ADCON0bits.GO_DONE != 0); //Loop here until A/D conversion
iv_temp1 = ((ADRESH << 8) + ADRESL);
input_voltage = (((iv_temp1 * 5)*1000) / 1024);
iv_temp2 = input_voltage / 1000;
iv_temp3 = input_voltage % 1000;
iv_temp4 = iv_temp3 / 100;
iv_temp5 = iv_temp3 % 100;
iv_temp6 = iv_temp5 / 10;
iv_temp7 = iv_temp5 % 10;
lcd_goto(2, 1);
lcd_putch(iv_temp2);
lcd_putch(iv_temp4);
lcd_putch(iv_temp6);
lcd_putch(iv_temp7);
}