Measuring Power supply start up Time

[stanleystan]

How do you measure a power supplies start up time?

For logic circuit to not cause glitches , the power supplies start up time should be? to prevent logic glitching

What is the difference between a 60hz power supply and a 400hz power supply? is it the filter capacitor values that is the only difference

 

[zeyad.kassaby]

How to measure power supply start up time
first for logic circuit you should have a Reset function inside the logic it self to avoid such proplems
with a delay about 9ms .more time is better no fixed rule for it

the differance between PS
in 400 hz all wires used in coils and inductors are thinner in diameter(called Skin Effect) . if it's a switching power supply the 60 hz can work on 400 hz with no side effect but even better ,but be curfull if the power supply has an AC fan . the filter capacitor is only to reduce harmonic distortion
which is logic to change the design of this filter.
hope it helps
Zeyad

 

[chuckey]

The whole reason for 400 HZ power supplies is from aircraft, where the mains transformers can be made much smaller and lighter. The other knock -on effects was that the smoothing chokes and capacitors could also be made smaller (and lighter). No Litz wire was used in 400HZ components.
Power supply start up times, Hmm, any decent logic circuit should have its actions inhibited or reset until Vcc is within .5 of volt from its nominal. So when the logic is let loose the Vcc is within the working tolerance. How to measure it, you need a single shot storage scope, so you can trigger it at, say .25V and store the display as the Vcc rises to its final value. I would think that the time to reach 90% of Vcc would be a good time to log.
the power supply coming on will not cause any glitches, because of the reset /hold off function.
Frank

 

[stanleystan]

the power supply coming on will not cause any glitches, because of the reset /hold off function.

How long does the reset have to be on to prevent logic IC chips from causing output glitches? or keeping stored memory like flip flops

I was having a digital TTL and CMOS glitching problem when I was turning on the power and turning off the power to the circuit, it would cause Logic IC chips to output a glitch which would cause a false triggering to other Logic IC chips , gates, flip flops etc.

How would you troubleshooting something like this? how would you find the Logic IC chip that is causing the Glitching output?

 

[chuckey]

The first thing to do is to make sure that the power supplies are behaving properly and not ringing when switched on. I have come across this and some times it was so bad that it operated the crowbar.
When the power comes on, what state do you want the logic outputs to be? One way is to hold the output of the logic in a rest state, until the power supply has settled, a few 10s of milliseconds? The other way is to put transmission gates in series with the outputs and keep them open until the power supplies have settled.
Frank

 

[zeyad.kassaby]

I had this problem before and as I told you before you must have a Rest function in your logic design . its function is holding the whole logic for a while of time ( about 50 msec) no power supply for mid and low voltage will be more than that unless it has a programmable BITE(built in test). then after this while the power will be stable and the circuit is free of transient time problems. unless you need to make some operation within this period of transient .
the reset function is a basic counter to hold the whole logic and reset any data and supports you with a reset logic you can initiate with an external logic or switch .
hope it helps
Zeyad

 

[stanleystan]

I told you before you must have a Rest function in your logic design . its function is holding the whole logic for a while of time ( about 50 msec)

Why does it need to reset for 50 mseconds for Logic chips?

where does it say the "reset time" on the datasheets for Logic IC chips?

no power supply for mid and low voltage will be more than that unless it has a programmable BITE(built in test).

Yes a lot of logic circuits have a BITE circuit

What does this BITE circuit do?

In the BITE circuit is the counter and reset function circuit?

 

[zeyad.kassaby]

power supply start up time
the transient time for power supply is mainly of the cap's at the output to prevent voltage drain.
and the load also is a factor .
in transient time the output voltage changes from zero to the required voltage(+5 vdc ) which causes a funny behavior of you digital logic circuit . so ,how to stop the logic circuit during this period of time ,by keeping a reset function working during the transient time
you can build the reset function by a counter holds the reset logic for a period of transient time

BITE function is build to make many internal simple test for a system (combined of digital logic ,analog and maybe relays also ) before the system is online . this should be put in mind with some power supplies . but let's walk through the easy way
first check your power supply if its simple one with no digital output port ,consider no bite sub function in it.
2nd look at the output caps in it , around 3 mf then the transient time will be around 9 ms
3rd then you need to hold the digital circuit for 10 msec to make it safe
4th if the design based on 74xxx family use a counter or monstable multi vibrator to hold your circuit .
note the data sheet of the ic's has nothing to do with reset time , but digital circuit needs a stable dc voltage source,
hope it helps
Zeyad

 

[stanleystan]

the transient time for power supply is mainly of the cap's at the output to prevent voltage drain.

How do filter capacitor prevent voltage drain?

I thought the filter capacitors prevent harmonic distortion or filter out harmonic distortion

2nd look at the output caps in it , around 3 mf then the transient time will be around 9 ms

So the filter capacitors values will be the transient time total?

,by keeping a reset function working during the transient time
you can build the reset function by a counter holds the reset logic for a period of transient time

What circuit is this called? is this the BITE circuit or called something else?

Yes Some BITE circuits have a monostable counter or timer built into the power supply

 

[zeyad.kassaby]

@stan
using of caps
1st: is to isolate harmonics of the circuit (usually small caps no polarity in pf)
2nd : big caps up to 1mf each used to prevent voltage drop due to sudden current consummation also called reservoir power supply.

transient time:
power supply have an output impedance(for example 10 ohm) and caps at the output , and also don't forget load impedance ,all of them control transient time (which is the elapsed time taken from ps to get its output voltage from zero to desired voltage.

reset function
is not the BITE circuit the BITE circuit is inside the ps or in the system that the ps is used in
if you are using the ps only for your logic circuit ,just consider the only protection is the under voltage and over current circuit,
the reset function is built by you ,because at transient time the output voltage of the ps is not stable yet ,so no one can be sure of the performance of the logic , so you build a reset function to prevent this phenomena ,that's your design

hope it helps
Zeyad

 

[dick_freebird]

For my purposes I made a little 5V reed relay "nugget" with
a 50 ohm shunted coil that I drive with a pulse generator
at low frequecy, and the NO, COM terminals of the relay
shunt the power supply enable switch. This gives me a
trigger signal for the 'scope and I can measure the time-to-
reulation-band, observe turnon monotonicity and so on.