Measuring power consumption

[digital design]

Hi everybody
I want to measure and compare power consumption of digital modules with different architectures. For example some counters with different transistor level structures.
For fairly compare, I must simulate all of them in the same conditions. Can anyone help me about these conditions?(such as time and frequency of simulation)
For power measurement of digital circuits, the worst case of input pattern must be considered. What is the worst case of input pattern for these digital modules? Adder, multiplier and counter.
Please help me

 

[BradtheRad]

To measure milli-amps, you typically put a resistor inline, and measure the voltage across it.

Its value should be low enough so that it does not reduce supply V to the circuit you are testing, yet high enough to allow a sensible reading on your meter (DC or AC or oscilloscope).

A suitable value is 2 to 5 percent of the circuit's impedance.

If the load is changeable, you must decide whether you want a single reading which is an average of all readings, or whether you want to make a list telling which conditions draw what amount of power.

 

[digital design]

Thanks for your guidance.
I use Cadence tool for simulation. For power measurement I measure average current of supply voltage and multiply it by value of supply voltage. ( P= Vdd * I )
Average current is different in different time intervals. Now I want to know what time interval is suitable for power measurement and comparison? For example for a counter, the time interval must include one period of counter (from 00...00 to 11...11) or more periods? And bout other modules like adder, multiplier, shift register.

 

[BradtheRad]

To measure in that amount of detail, you need to slow the clock frequency, so that you can take readings between each change of state of the clock.

You will want to observe whether current draw changes at a positive-going transition of the clock, versus negative-going transition.

- - - Updated - - -

To measure in that amount of detail, you need to slow the clock frequency, so that you can take readings between each change of state of the clock.

You will want to observe whether the current draw changes at a positive-going transition of the clock, versus negative-going transition.