maximum stress on MOSFET

[--BawA--]

In forward converter , during Off cycle , the stress on mosfet is 2 times VDC, How? Why not only VDC ,why it's double?

 

[FvM]

You're apparently talking about a single switch converter.

Actually the maximum transistor voltage isn't exactly double Vdd, it may be more or less, depending on the maximum duty cycle and reset winding ratio. It's double Vdd + overvoltage due to leakage inductance for 1:1 reset winding.

A two switch forward converter limits the transistor voltage to Vdd.

 

[D.A.(Tony)Stewart]

In the forward converter, with the number of turns on the reset winding Nr equal to that on the power winding Np, maximum off-voltage stress on the power transistor is twice the maximum DC input voltage plus a leakage inductance spike. Conservative design, even with all precautions to minimize leakage spikes, should assume they may be 30% above twice the maximum DC input voltage.

 

[--BawA--]

FvM and Sunnyskyguy, i was reading pressman's power supply book , i want to know how the maximum stress on mosfet is 2VDD when there is 1:1 reset winding ratio(neglecting leakage inductance effect), why not only VDD+ leakage inductance spike .In book they have simply written that its 2 times VDD + leakage inductance spike , but they didn't explain it, please through some light on it..

 

[FvM]

Please consider that the voltage across a transformer winding is AC. For the simple case of symmetrical square wave, if the negative voltage magnitude is 300V, than the positive is 300V as well. Now take a look at the circuit and how Vdd and transformer voltage add.

 

[--BawA--]

Sorry FvM , but I still didn't get you.
If we rectify a sinusoidal grid supply , we'll get a DC voltage approx 311V wrt GND , now in forward converter during ON time , the Drain voltage of mosfet with respect to source will be approx 311, and during off time the stress on mosfet is aprox 2x311 i.e 622V (neglecting leakage inductance spike), I want to know the mechanism behind OFF time stress voltage , kindly explain.

 

[FvM]

now in forward converter during ON time , the Drain voltage of mosfet with respect to source will be approx 311

No, its about zero. The drain voltage swings 310 V down during on time and 310 V up during off time (under the conditions discussed above). Makes 620 Vpp respectively 620 Vd,max.

 

[--BawA--]

Now take a look at the circuit and how Vdd and transformer voltage add.

you mean to say that during OFF time , the magnetizing inductance of the transformer reverses the polarity across transformer , so that this voltage is added to VDC and results in 2VDC at the drain . isn't it?

 

[FvM]

Simple answer but true. You'll come to the same conclusion if you consider that the average voltage across a transformer winding (or and inductor) must be zero.

 

[chaowang]

dear friend,
First when Np:Nr=1:1,There is 2 times on MOSFTE'drain,on off time the voltage of Np invert and equal -Vdc.Meanwhile,reset winding Nr'voltage is +Vdc and reflect to winding Np ,so ,Vdrain =Vdc+(Np/Nr)Vdc,because of Np:Nr=1:1
there is 2 times,,,
Thank Y

 

[--BawA--]

Thanks FvM and chaowang
, Things get much clear to me now,
one more thing to ask , do you know any gate driver for dual switch forward converter ? As i am planning to use a microcontroller to generate the desired pwm signal , i have to drive both high and low side mosfets simultaneously.


Thanks