Matrix problem in vhdl

[Nivii1406]

I have to code a 64x64 matrix using the elements from a smaller matrix, i.e., a 4x4 matrix. I've been at it for three weeks now but I haven't been able to attain a result without errors.
The steps involved are as follows :
1. Take four 4x4 matrices
1. Construct two 16x16 matrices using the 4x4 matrix.
2. Construct a 64x64 matrix using the two 16x16 in the diagonals. All other values have to be zero.

It is important that I finish this in the next couple of days. Please do help.

 

[permute]

there appear to be a total of 64 elements in a small implementation and 4096 elements in the large implementation. What specifically are you expecting the VHDL to do?

for example, is this a simulation only construct?
is this a synthesizable construct?
how do you plan to put data into the structure? eg, data from a PC (ethernet/usb/rs232 interface?)
how do you plan to get data from the structure?
Are there operations that can be done?
Is there are reason to do this in VHDL, or would it make more sense to do this on a computer with C/C++/python/etc...

 

[Nivii1406]

This should be a synthesizable contruct. I will enter d 4x4 matrices manually and I want the system to generate the 64x64 using the 4x4 matrices. It has to be implemented in FPGA and hence VHDL.

 

[TrickyDicky]

Before you go any further, have you got an architecture drawing of your intended circuit? or have you just dived in and just written some VHDL? theres a lot of VHDL that will not map to circuits that are suitable for an FPGA. So before you write any VHDL, you should have a rough idea what the final circuit should look like.

 

[permute]

Perhaps if-else statements would be of use? You haven't really given any interface requirements, and this appears to be a simple re-mapping problem.

 

[Nivii1406]

I need to use submatrices to build a matrix. If else doesn't seem to work

 

[TrickyDicky]

Instead of this big guessing game as to what you're actually doing, how about posting code?
Also, you didnt answer my question - have you got an architectural diagram of the circuit from before you wrote any VHDL?