madesham
Newbie level 2
Dear All,
I have done matrix multiplication based on the logic provided at the link:
https://www.fpga4student.com/2016/11/matrix-multiplier-core-design.html.
It uses IO's & logic blocks. I want to try with DSP48 slice in 7 series Xilinx FPGA. Please suggest the solution.
Thanks in advance
I have done matrix multiplication based on the logic provided at the link:
https://www.fpga4student.com/2016/11/matrix-multiplier-core-design.html.
It uses IO's & logic blocks. I want to try with DSP48 slice in 7 series Xilinx FPGA. Please suggest the solution.
Thanks in advance