mapping tsmc std cell library and tanner library

Status
Not open for further replies.

ksrinivasan

Member level 3
Joined
Jun 29, 2009
Messages
67
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,288
Location
India
Activity points
1,706
tsmc library

hi friends.
iam working in leonardo spectrum for vhdl synthesis as part of a digital asic project.I got the tsmc 018um from mentor adk. i have loaded the library and its working fine. I am using the netlist in tanner SPR. I have a small problem here. The tanner SPR is not doing automatic mapping. The reason i suspect is because of mismatch of libraries in tanner database and tsmc foundary libraries.

Can somebody guide me how to do the automatic mapping. Basically some attribute settings have to be done in leonardo spectrum

Thanks in advance

Srinivsan
 

stdcell lib

I don't know Ledit SPR ..but early version SPR not support verilog netlist only by
ledit schematic tool format , and for Place & routing

like cellsnake (snake Tech be merge by Caence) need make cell LEF vie
like standard cell maybe like AND2 / Or2 gate
have define cell I/O and which area can not be routing /CROSS

Tanner SPR maybe need redefine cell
If tsmc std cell have 200 cells .. you need redefine 200 cell by you
or use other tool convert , as I know we usually use Ledit for fully layout
not for P&R
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…