manipulate voltage output in transimpedance amp circuit

[robismyname]

I have a circuit (attached) that is providing too much voltage into my FPGA. I attached the circuit.

The output of the transimpedance amp is sending 4.2V to my FPGA which only needs 3V. I h ave reason to believe that the 4.2V input into the FPGA is causing some weird anomalies to occur while testing my FPGA with 4.2V input from amp. I was wondering if I increase the voltage drop at R80 would that help bring the voltage down to 3V into my FPGA. Or is the voltage output controlled by both R80 and R78?

Please advise

 

[FvM]

We would usually expect at comparator or schmitt-trigger circuit that sends a clear digital level to the FPGA input. But in any case, the level muste be limited according to the safe input range of the respective IO standard. This can be e.g. achieved by a voltage divider or diode clamp circuit.