Making a 12-220 inverter, HV part with TL494

[Artlav]

I'm learning how to make an inverter, and need help figuring out what is normal and what is not, and fixing the latter.

The basic layout is - make 320V from 12V, using a high frequency, small size ferrite transformer, rectify the 320V, turn them into AC with a full bridge.
It splits nicely into two parts, and i want to debug them separately.

The transformer is a 4cm HM2000 ring, with 83 turns of 0.4mm secondary and 3+3 turns of 1mm primary, and it's running at 125kHz.
The TL494 is wired to shut down below about 10.8V, to keep the lead-acid battery healthy.

There are several potential problems (all measured at about 35W load, with 3.2A drawn at the source, unless noted otherwise).
First, and most obvious - MOSFETs are getting warm quickly.
Not unexpected on it's own, but the curious thing is that the heating is about the same for any fet i tried, from low Ron, high capacitance, to high Ron, low capacitance.
I'd expected the switching losses to be less for the latter, and 3A isn't much current even for a 0.11Ω Ron.
IRF530a have 1/10th of rise time of IRFZ44, and 3 times higher Ron, so why would it heat the same?

The drain-ground looks strangely jagged, and there is a big spike when one turns off, but the other isn't on yet (20V/1µs):

The gate drive appear clean (5V/1µs)

Second, there are current spikes on the input (across Rsense), that don't seem right (0.5V/1µs)

The spikes are large enough to trigger a 12V PSU to go into current limiting, and adding larger capacitors changes nothing (all images are from battery power).
Also, the current seems to oscillate wildly at a very high frequency, instead of being steadily climbing.
Is that normal, and if not how to fix it?

Third, you may have noticed that the voltage on the FET is 24V drain to source, instead of 12V.
Why is that?
Are these additional 12V induced on the idle 3 turns from the active ones?

Finally, are there any other suggestions or efficiency improvements to make?

 

[picgak]

The voltage on the FET is 24V drain to source, instead of 12V is normal this happens due to transformer action when the other FET is on
It is normal for the mosfets to run warm use propper heatsink
Try increasing the dead time and see the waveform

 

[Artlav]

Well, heating represent losses, and heatsinks just fix the symptoms, not the problem.
In other words, i'd like to try to reduce losses first.

Meanwhile, i've added an RC snubber between drains, 10nF and 5Ω in series, and that reduced the heating considerably.
With the snubber the best-efficiency frequency gone down to 80kHz.
Now FETs are only warm, with no heatsinks at 35W load.
IRFZ44n and STP80NF10 seem to be the best at these power levels - average Ron and capacitance.


Now that it can run for a few minutes, another issue i can observe is that the transformer ring is at 65*C after only a few minutes of work with 35W.
Why could that be?
Wrong frequency, wrong wire thickness/turn count, wrong size, something else?
It's 40.0/25.0/11.0 mm, 2000НМ (N87 equivalent) ring.

 

[Artlav]

One more question - should i add more than precise ratio of secondary windings, or keep it down?

The problem is, with the exact amount the voltage starts dropping as the load goes above 50W.
On the other hand, with extra windings the TL494 starts regulating the voltage, and that causes the efficiency to take a dive.

Is there a way to solve this?
Maybe there is another way to prevent voltage sag, or prevent losses (and sounds) from the regulation?

 

[Artlav]

Meanwhile, the problems are getting shot one by one.

The transformer heating issue was fixed by rewinding it into 4+4 and 136 one and dropping the frequency to 50kHz.
The noise and surges were not caused by regulation, but by oscillations in the TL494, which were stopped by an RC snubber between 3 and 15 and a capacitor at Vref.
Even more stability was attained by adding an inductor at the output side.
Several RC snubbers were added around the FETs.

Now it works mostly well, at about 75% efficiency.
The FETs are only warm with small heatsinks.

Questions remaining:
-The RC snubber between the drains is heating up a lot, 90*C or so after 30 minutes at 60W load, and it's 2 10Ω 3W resistors in parallel. Was that chosen incorrectly, or does it simply consume the heat that would have appeared at the FETs anyway?
-Does 75% efficiency look normal for a design of this type, and if not, how to improve it?

Current schematic:

 

[mtwieg]

75% isn't horrible, but it should be better. Do you know what the magnetizing and leakage inductances of the transformer are? Have you measured your ripple currents on the input and output? It may be that excessive ripple and leakage are increasing losses significantly.

For the RC snubber, the temperature rise sounds much too large. Can you verify from the waveforms that it's actually damping things appropriately? How did you choose the snubber values? Generally you should only need one snubber type.

 

[Artlav]

Without it there is a 4% increase in input current (40W load), and the fets heat up much more.
However, i can't quite take a look at the drains now - touching a scope to either makes the current go down 7%, with no effect at the output (that i can see - voltage don't change and the light bulb don't flicker).
Looks like something is quite wrong if touching a scope probe can increase efficiency so drastically, but i can't figure out what it is.

Here are with RC and without it, but with that effect from the scope, i'm not sure how correct these are.

The new ring is Epcos N87, 40.0/25.0/11.0 mm of size.
By the math i should be loosing half a watt in magnetic losses, and half-a-watt in resistive losses there (at 100W load). No idea how to measure it, but the ring stays no hotter than 55*C, so it sounds about right.

Can't see any ripple voltage at the output with anything i have, but increasing input or output capacitors, or output inductance changes nothing at all.

The the drain-source snubbers were actually useless, and removing them increases efficiency a bit.

The drain-drain snubber was picked up by trial and error while looking at the ampmetre. As might be obvious, i don't have a clue as to how to pick it right by the math.

- - - Updated - - -

A bit of a follow-up.
The scope touch effect only happen when the thing is powered by a PSU. Running from a battery removes the effect completely.

The drains look about the same, however.
Without RC:

With it:

 

[mtwieg]

Looks like you might have some grounding issues that make the scope waveforms messy no matter what. Could you post a picture of the layout?

I'd expect large ripple currents on the input, which would definitely increase losses. Consider that with 12V in, 320V out, N=136:4, and 470uH of output inductance, you should see a di/dt of 0.187A/us on the secondary, or 6.66A/us on the primary. So at a duty cycle of 25% (ton=5us) you should see peak currents over 30A on the primary. Do you see this appearing over Rsense? If so, that is likely a significant cause of losses.

 

[Artlav]

Won't be surprising, with the whole thing on a breadboard.
Setup: http://orbides.1gb.ru/img/setup.jpg
Board: http://orbides.1gb.ru/img/board.jpg
The part in question is the upper half, lower one is the inverter.

The current on Rsense rises to about 12A (inserted between the capacitors and central transformer point).
0.5V, 2µs, 40W load.

 

[mtwieg]

Yeah with a breadboard layout like that, getting clean waveforms will be near impossible. And efficiency will suffer due to the high leakage inductances involved. I would recommend building the circuit dead-bug style, like shown here:
**broken link removed**
At least putting the power circuitry on such a layout should give much better behavior. And you want to shorten the wires to the transformer as much as possible to minimize leakage inductance. The primary of a push pull transformer (or any center tapped transformer) should be wound bifilar if possible. Also you could afford to use much thicker primary wire.

The Rsense waveform is smaller than expected probably because the input voltage is sagging due to resistance. You can see that the slope of the waveform is drooping, which also indicates ESR.

So basically you should rebuild the circuit to be the same in terms of your schematic, but with better construction in order to reduce ESR and ESL. Often power circuitry is as much a mechanical matter as much as an electronic one, unfortunately.

 

[Artlav]

Ok, then i'll go ahead and etch it onto a PCB, and see what happens.
Are there any specific things to avoid or follow in the layout?
Would it be bad to put the ring transformer directly under the board, flat against it?

What does bifilar mean here?
Simply one side on top of the other by two parallel wires, or some induction-cancelling layout?

 

[mtwieg]

Just keep paths with high di/dt short and wide, and have a solid ground plane. The transformer can be under the board, but just make sure its leads are as short as possible (like an inch or less is good).

Bifilar winding means that you have a pair of wires twisted or bound tightly together in parallel. Then you wind that bifilar pair around the transformer. This results in two windings with equal number of turns that are very closely coupled together, which minimizes leakage inductance. This technique can be applied to any set of windings with an integer turns ratio (you can put more windings in the bundle for trifilar, quadrafiler, etc). Look up some images on google and you'll get the idea.