LVDS transfer via 50-Ohm (single ended) cable

[Juja]

Hi there,

I'm using a sensor with 16 LVDS pairs @160MHz. I have to transmit this data to an FPGA (Altera) via a 20cm cable. In the past I was using a 100-Ohm diffential high speed cable from Samtec:
https://www.samtec.com/technical-specifications/Default.aspx?SeriesMaster=EQDP

Now I need another solution because this cable is too rigid for a new application.

Samtec told me that a lot of companies using high speed 50-Ohm single ended cables (which are much more flexible) for LVDS data and it should also work well... So now I'm planing to use this one:
https://www.samtec.com/technical-specifications/Default.aspx?SeriesMaster=EQCD

My questions:

1) Is this 50-Ohm cable really usefull for my application?
If yes:
2) What Pin-assingment scheme I should use? Always 2 neighboring wires for 1 LVDS pair and then one wire free connected to GND?
3) How to route the LVDS pairs then on the PCB? Still routing in 100-Ohm differential and 100-Ohm termination resistors close to the FPGA?

Thanks so far for your help!

 

[FvM]

1) Is this 50-Ohm cable really usefull for my application?

It's a valid option. You also find PCIe test boards connecting 100 ohm differential pairs through two SMA connectors.

What Pin-assingment scheme I should use? Always 2 neighboring wires for 1 LVDS pair and then one wire free connected to GND?

I don't think that it's necessary to have unused coax wires between differntial pairs. Crosstalk of adjacent pins should be sufficient low, I'm quite sure there's a specification available from Samtec.

3) How to route the LVDS pairs then on the PCB? Still routing in 100-Ohm differential and 100-Ohm termination resistors close to the FPGA?

Yes preferably differential 100 ohms because it takes less room than two uncoupled 50 ohm lines. Generally speaking, there's a continuous transition from separated 50 ohms to closely coupled differential 100 ohms by varying the common mode impedance (25 ohms towards infinity). Increasing the common mode impedance just reduces the possible common mode crosstalk.

 

[Juja]

Yes preferably differential 100 ohms because it takes less room than two uncoupled 50 ohm lines. Generally speaking, there's a continuous transition from separated 50 ohms to closely coupled differential 100 ohms by varying the common mode impedance (25 ohms towards infinity). Increasing the common mode impedance just reduces the possible common mode crosstalk.

Sorry but what exactly do you mean with "common mode impedance"?

Another question: I also have to transmit a 160MHz single ended clock from the FPGA via the same cable to the sensor.

The setting is as follows:

FPGA => 3 cm to connector => 20cm cable => 3cm to clock dirver => 3cm to receiver

How should I route and terminate the wire?

My idea is to route the 160MHz clock with 50-ohm on the two PCBs (FPGA board; Sensor board). Then terminate the track close to the FPGA (50ohm in series) and again close to the clock driver (50ohm in series):

FPGA => 50ohm in series => cable => 50 ohm in series => clock driver => sensor.

Is that correct or should I better use another routing and termination technique for a 160MHz clock? What is the best termination technique for a clock of that speed?

Thanks so far!

 

[FvM]

Sorry but what exactly do you mean with "common mode impedance"?

I presume it's well defined technical term related to differential transmission lines. It's the transmission line impedance measured against ground when connecting both wires in parallel, it's another parameter that characterizes a differential transmission line besides differential impedance. The lowest value is achieved with a differential pair comprosed of two uncoupled single ended lines as you intend. A differential I/O standard needs to specify common mode impedance if it implements single ended signalling as e.g. USB. Otherwise it's up to the cable and PCB designer to chose a common mode impedance.

You can use separate 50 ohm wires for a differential signal (of course with closely matched length) and still apply differntial parallel termination at the receiver. There should be a certain absorbing termination for common mode interferences to prevent them from bouncing back and forth, but the source side series termination is usually sufficient to achieve this.