I think 30MHz will not be sufficient but simulations will confirm this or not.
In your position i would start with an ideal one pole model for the CMFB amplifier and i would try to determine the minimum loop GBW (gain-bandwidth product) suitable for this application.
In parallel you should care about the loop phase margin for stability requirements.
All the above should be extracted via stb analysis (if you work with cadence spectre simulator).
Finally a common mode transient test at 600MHz will give you the final verification that the quantities you calculated above are enough.
You would want the CMFB to be slower than your data by far, and faster than
normal supply ripple (usually 1MHz or less). What's the fastest common-mode
influence that you need to track out?
even if cmfb loop bw=30MHz, I am able to see a proper operation@600MHz in transient simulations.
another thought is given the huge size of the driver transistors, the cmfb opamp will be loaded with a huge cap. trying to achieve a higher bw here would require excessive current.