Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
First of all. NPN bandgaps are always better than PNPs. If your process is bipolar or BiCMOS go for it. Now, there are several mismatch sources in a BG:
* The bipolars
* The amp
* The PMOS current mirrors
* The array of resistors
You can do now several things:
* Of course, a good layout. In general do not use minimum size devices
* Large ratio in the bipolars
* Big PMOS current mirrors. Specially large L.
* Large input pair of the amplifier. Specially large L.
* Use a unit resitor to build of your resitor values.
May be you meant process with NPN having separated collector that can be connected anywhere unlike PNP those collector always connected to P-substrate.
But it is not standard CMOS process.
If it is not standard CMOS process and you can create the circuit with the PNPs, the Rptat and no amplifier, then it'd be the same, just the bipolars mismatch
Thanks a lot guys! I agree with you.
I also found that if we stack the BJTs, the mismatch effect can be reduced. But of course with the trade-off of area..
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.