Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Low threshold voltage

Status
Not open for further replies.

Hawth33

Newbie level 1
Newbie level 1
Joined
Oct 22, 2013
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Visit site
Activity points
8
I have recently fabricated multiple diodes onto a wafer use an NMOS process. As usual, not all of the diodes have the ideal threshold voltage (0.7 to 0.8 V). What are usually the causes of low threshold voltages? Thanks for your help in advance.
 

Hi,

Fabrication side threshold voltage variation:

It depends upon technology.... and low threshold voltage means higher level of doping in your wafer...

it also depends upon some layers and thickness of layers and it changes according to the foundry..

Design side threshold voltage variation:

1) unequal voltages on the terminals...

2) IR drops due to layout...

3)mismatches in the device parameters and Process variations..

Thanks..
 

Is it really threshold voltage (MOS diode) or is it forward
voltage of an actual PN diode? There would be different
causes.

And of course every lateral diode has a (field or thin)
MOS gate sitting across it. This can easily compromise the
I-V if the oxide is charged, dirty or defective, as the MOS
action raises or lowers the surface "effective doping".
Damage can be simple charging short of outright failure,
from handling / probing and so on with inadequate ESD
controls, in-process charging (antenna), etc.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top