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low power multiplexer design

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meliT

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Dear all,
Hi.
I tended to design a low power 32-to-1 multiplexer and compare the DC extraxted power result with original one. I thought of tree of 2-to-1 blocks of MUXs. But not only the result does not show any improvement, but also the original MUX has lower power and higher slack time. I mean, even if I wanted to cover the increased power result with an improved PDP, it was not possible because neigther the time report has no improvement comparing to original MUX.
Does any one has any idea why I can't get the results I expected? :-(
Thanks in advance
 

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