Hi. I'm trying to design a Low Noise Amplifier to work in the band of GPS L1 (1.575GHz). After the selection of both input and output matches, I simulate my LNA from 0 to 5 GHz, and I see that my S11 is slightly greater than 1 from 0 to 900MHz.
In my band of interest the LNA is stable, but i really need to unsure that it is stable for every frequencies?
Sorry, I meant 0dB. I have to ensure that it is under -15dB at my point of operation (1.575GHz)?
But what is concerning me, is that around 900MHz my S11 is greater that 0 dB..
I changed the polarization, chosen 20mA (less gain) at I get the same situation.. Any ideas?
Sorry, I meant 0dB. I have to ensure that it is under -15dB at my point of operation (1.575GHz)?
But what is concerning me, is that around 900MHz my S11 is greater that 0 dB..
I changed the polarization, chosen 20mA (less gain) at I get the same situation.. Any ideas?
But I pick up both matches by doing analysis of the regions of stability. We do that analysis for the frequency of interest.. How can I guarantee that it will remain stable for all other frequencies?
But I pick up both matches by doing analysis of the regions of stability. We do that analysis for the frequency of interest.. How can I guarantee that it will remain stable for all other frequencies?
You should check the stability by plotting K and Mu stability factors up to fmax. of the transistor.If you see unstable regions, you should check the input and output stability circles for the band(s) of unstablity.Then you have to examine each unstable region and after that you should find and apply a "stabilisation techniques" ( for instance a parallel resistor with a DC blocking capacitor in series at the input/output or an amount of series/parallel frequency selective negative feedback, or simple a high valued resistor between Drain and Gate etc.)
There are many stabilisation techniques but it's essentially to move out the input/output stability circles from Smith Charts active region.
And also, why don't you look at this APP. Note ?? It's pretty useful.
I already accomplished the stability by using some stability techniques in the Gate and Drain of the Transistor; in the regions of the instability I applied resistors to dissipate the power, so that the negative resistence that we would see if we look inside the Drain/Gate would disappear .