fanwel
Full Member level 3
Hi all,
I try to write a code that will differentiate the input either odd or even for obtain the output.
Below is my code:
-----------------------------------------------------------------------------------------------------------
package my_data_types is
type vector is array (natural range <>) of integer;
end my_data_types;
library ieee;
use ieee.all;
use work.my_data_types.all;
entity even_odd is
port (clk: in bit;
A: in vector (7 downto 0);
out_odd: out vector (3 downto 0);
out_even: out vector (3 downto 0));
end even_odd;
architecture even_odd of even_odd is
begin
process(clk)
begin
if (clk'event and clk='1') then
for i in 7 downto 0 loop
out_odd <= A(2*i);
--A((2*i)+1);
out_even <= A(2*i-1);
--A((2*i-1)+1);
end loop;
end if;
end process;
end even_odd;
------------------------------------------------------------------------------------------------------------
But then, there is an error occurred when I compile the code.
Error (10381): VHDL Type Mismatch error at even_odd.vhd(23): indexed name returns a value whose type does not match "vector", the type of the target expression.
Can anyone help me..where my mistake? Many thanks
I try to write a code that will differentiate the input either odd or even for obtain the output.
Below is my code:
-----------------------------------------------------------------------------------------------------------
package my_data_types is
type vector is array (natural range <>) of integer;
end my_data_types;
library ieee;
use ieee.all;
use work.my_data_types.all;
entity even_odd is
port (clk: in bit;
A: in vector (7 downto 0);
out_odd: out vector (3 downto 0);
out_even: out vector (3 downto 0));
end even_odd;
architecture even_odd of even_odd is
begin
process(clk)
begin
if (clk'event and clk='1') then
for i in 7 downto 0 loop
out_odd <= A(2*i);
--A((2*i)+1);
out_even <= A(2*i-1);
--A((2*i-1)+1);
end loop;
end if;
end process;
end even_odd;
------------------------------------------------------------------------------------------------------------
But then, there is an error occurred when I compile the code.
Error (10381): VHDL Type Mismatch error at even_odd.vhd(23): indexed name returns a value whose type does not match "vector", the type of the target expression.
Can anyone help me..where my mistake? Many thanks