Loop powered pulse output circuit.

If you want accurate loop current measurement, you need a respectively connected shunt. Shunt resistance value and acceptable voltage drop is a matter of your design parameters. Presently the large load resistor value is the dominant restriction.

I'm not sure what you are asking me here. Suffice it to say, I want the fastest possible rise and fall times on the output wave forms without a lot of distortion for driving long cable lengths. Typically that is the reason to use loop current outputs rather than voltage outputs.

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Sounds like you didn't actually analyze the circuit behavior. The large shunt (680 ohms) you put on receiver side forms a low pass with the cable capacitance + internal circuit capacitance like C1 in your original "circuit2". Fast current loop is only possible with low load resistance.

Still not clear why you want both fast rise time and precise current.

FvM said:

If you want accurate loop current measurement, you need a respectively connected shunt. Shunt resistance value and acceptable voltage drop is a matter of your design parameters. Presently the large load resistor value is the dominant restriction.



Sounds like you didn't actually analyze the circuit behavior. The large shunt (680 ohms) you put on receiver side forms a low pass with the cable capacitance + internal circuit capacitance like C1 in your original "circuit2". Fast current loop is only possible with low load resistance.

Still not clear why you want both fast rise time and precise current.

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The 680 ohm resistor is not a shunt resistor that is part of the design, it is the I/V conversion load resistor which will be outside the loop circuit and is not something I cannot control. It is only in the simulation because it represents the worst case real world load that the circuit is going to see. I realize that a 250Ω load is typical with 4-20mA loop and will yield faster transitions.

I don't think 5% is terribly accurate and I probably could live with 10%. Speed is important but the current levels have to be something useful.

I've had a chance to get back to this design and I tool FvM's advice and pass the total current of the circuit through the shunt resistor. I now have a design that seems to work fairly well except for some ringing in the leading edge of the output pulse. The previous solution for damping the overshoot does not work with this design (it makes it worse) and I cannot seem to find a solution that works better than what I have right now. Any ideas how I might clean up the ringing without significantly degrading the pulse rise and fall times. Thanks in advance for the help.

Unfortunately the circuit becomes completely unstable with lower load resistance. Small load capacitances (e.g. 100 pF) cancels the slight ringing, larger load capacitance (1 nF) increases it considerably. Thus I think the first point would be to specify a range of load impedance the circuit is expected to work with.

I guess, it's rather difficult to make the present circuit stable for a wider load impedance range. Complete rework of the compensation scheme may be required.

FvM said:

Unfortunately the circuit becomes completely unstable with lower load resistance. Small load capacitances (e.g. 100 pF) cancels the slight ringing, larger load capacitance (1 nF) increases it considerably. Thus I think the first point would be to specify a range of load impedance the circuit is expected to work with.

I guess, it's rather difficult to make the present circuit stable for a wider load impedance range. Complete rework of the compensation scheme may be required.

Click to expand...

Ideally it would work with any load resistance as long as the supply voltage does not drop below the voltage required to ensure proper operation of the regulator. I do expect the output performance to change slightly over that load range. The difficult part of this design is that I need a compliance voltage of 4V ( I could live with 4.5V but the design goal is 4V) but the minimum voltage for the sensor circuitry (represented by the pulse voltage source in the simulation) requires a minimum of 3.5V so that doesn't leave a lot of head room to make the shunt resistor any larger.

Do you have any suggestions on the compensation scheme? I have another design that uses a instrumentation amplifier (AD8420) which does an excellent job of controlling the current across the load but it is way too slow to drive the output transistor much above 1KHz without serous rise/fall time issues.

I think std. current shunts are 50-100mV drop at max current using <1% parts (3) to get the gain to compare with Vref