Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Looking for information about ADC interface

Status
Not open for further replies.

petronas23

Newbie level 4
Joined
Apr 29, 2005
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,344
A DC interface

help!!!
am the 3rd year student at one of the private u in malaysia!
am doing thesis this sem, but i couldn't find the info regarding to my given title that is ' ADC interface with one output channel and manual input channel selection using VHDL application'. i need somebody to guide and help me..... thanks!
 

Re: I NEED UR HELP!!

Please, be more specific about what are the system. Only by title could be many sollutions. :)
 

    petronas23

    Points: 2
    Helpful Answer Positive Rating
Re: I NEED UR HELP!!

penrico said:
Please, be more specific about what are the system. Only by title could be many sollutions. :)


MY LECTURER given this title to me and ask me to do the thesis!! am confuse with this title!! cz electronic thing r complicated ,will come out many result! i told her this title is just a hipothesis,is not a title!! i can't seacrh any info for the given title!! as i think the main title should be CPLD interface for an ADC!! and the title which lecturer ask me to do is adc interface with one output channel and manual input channel selection using VHDL application. which mean design a state machine that control the ADC and store the output values in an octal lacth automatically. The controller is a state machine that will accept low pulse from a pushbutton switch labled go, perform one analog to digital conversion from one of eight analog channels and store the resulting 8-bits dugital value in an octal latch. THe analog channel is manuallyy selected by DIP switches at the address select input.The entire state machine and latch portion of the circuit contained in one CPLD,such as the altera EPM7128SLC84-7 on the altera UP-1 circuit board.

can u help me?? anything can reply to me?? or write down my mailing address..
ck_tan2020@yahoo.com and ck_tan2020@hotmail.com, i reallly need someone to help me...thanks for ur reply!!
 

Re: I NEED UR HELP!!

Do you need to implement it?, what level of help can we do for you????. I think is all explained in last post. So, what things you don't know how to do?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top