look for good current limit circuit for LDO

[rogerqin]

current limit loop stability circuits

Hi, all
Is there any good current limit circuit for LDO?
Thanks for your help.

 

[maofeng]

ldo pass

Plesea reference p.p. 72 of this book (foldback current limiting circuit)

The Essense of Power Electronics by J.N. Ross

You can get the book at :

**broken link removed**

 

[dsPIC24F]

pass transistor current limit

Most of the LDO has a thermal limit function which also limit the current.

 

[WindRay]

current limiter open loop

Hi

I guess you are using a PMOS transistor as the pass transistors as the design is LDO. One for the easily method is to use a current mirror circuit that mirror the current in the pass transistor with a certain current ratio. Then, this current is used to compare with the reference voltage (current limit) through a resistor or using a opamp to change the gate voltage of pass transistor. (Please consider the current limit loop stability beside the normal operation loop stability)

The only concern is the VDS differences between the pass transistor and the current mirror transistor. Some people used another opamp to make the same VDS voltage on the current mirror transistor.

Side effects: There are bandwidth limited issue.

More simply method is sense resistor in current path or part of current path.

Have a good time designing....

 

[rogerqin]

pmos ldo current limit

Hi, WindRay
Thanks for your reply.
I have used such a method to design current limit circuit. The most important issue is the stability of the negative feedback loop. The best condition is that when the current limit circuit begins to work, the main feedback loop should be cut. As I use a single stage opamp, it is difficult to realize. Do you have any good suggestion, thanks.

 

[WindRay]

ldo with current limit function

The design of the main loop when the current limit is not triggered is the same as any LDO design. You need to consider the method of compensation depending on the a few things, output capacitor, capacitor ESR, Max load, min load, and the opamp structure.. If you have some problem on stablity, try to lower the open loop gain. (correct me if I am wrong). Normally, LDO open loop gain is lower than the normal opamp open loop gain.

When the current limit is activated, please consider the other loop and try to use same compensation capacitor as the main loop. I does not really understand what you means on single stage opamp...

 

[liuyonggen_1]

current limit ldo

Hi

I guess you are using a PMOS transistor as the pass transistors as the design is LDO. One for the easily method is to use a current mirror circuit that mirror the current in the pass transistor with a certain current ratio. Then, this current is used to compare with the reference voltage (current limit) through a resistor or using a opamp to change the gate voltage of pass transistor. (Please consider the current limit loop stability beside the normal operation loop stability)

The only concern is the VDS differences between the pass transistor and the current mirror transistor. Some people used another opamp to make the same VDS voltage on the current mirror transistor.

Side effects: There are bandwidth limited issue.

More simply method is sense resistor in current path or part of current path.

Have a good time designing....

consider the current limit loop stability beside the normal operation loop stability？
Why does we need to consider the loop stability of current limit comparator?
I think it belong to large signal response

 

[WindRay]

current limiter circuit for ldo

Under current limit condition, we need to ensure the the output current of the LDO remains stable and constant while the output voltage drops according to the load resistor. So we need to ensure the current limit loop to be stable.

If you are talk about over current detection, then a comparator is used to detect the over current condition and send a signal to some other circuit to do the necessary action. Then you donot need to consider the stability.