Logic design, how do I find out the bit-length of numbers?

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kel8157

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Hello!

My design is a large parallel processing unit, which requires to find the
bit-length of signed numbers and dynamic shifting in a single cycle

Here is my code..
Are there any more efficient/fast methods to accomplish these two tasks?
My clock cycle is stingent, and many nested ifs or long case statements
might cause timing issues in later stages.



// dynamic bit-shifting
input [4:0] shift_pos_in;

reg [31:0] din;
reg [31:0] dout;

always @()
case (shift_pos_in)
5'd0: dout <= din;
5'd1: dout <= {din[31], din[31:1]};
5'd2: dout <= {2{din[31]}, din[31:1]};
..

endcase
end

 

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