I have question regarding the encoding...please help me out with this.
I have a 4 bit input..lets say 0101 (right side bit being the most significant bit)..Now my logic(probably encoder) should give out address of all the 1's in the 4 bit input.
i.e., the output should be 11 and 01.
1. If you have a 4-bit input initialize a counter to 3 (i.e. 0b11).
2. Now if the MSB (the right most bit) is 1 then multiplex out the counter, otherwise send 00,
3. shift the 4-bit value right (towards the MSB)
4. check the counter if it is 0, then jump to step 6, otherwise decrement the counter.
5. repeat steps 2 thru 4 for the next 3 bits.
6. Done.
Your task simply is not possibke with just two output bits.
Draw a truth table and you will see.
Pleases rethink your task.
An example: with 2 output bits there are four possible output states: 00, 01, 10, 11
Which of the four states do you expect if the input value is 0000?
What is the output state when input is "0000"?
Or:
What if the input value changes after the second clock edge?
What if the next input value is the same as the value before?
What is the output value after the 5th clock edge?