Logic Analyzer Input Circuits?

[halr]

Does anyone know what the input circuitry to a professional logic analyzer (Tek, Agilent) looks like? I'm curious to know how they are doing their input protection, and how they handle triggering for particular logic families.

Thanks,
Hal

 

[lollobrigido]

I think they use some optoisolators matrix. This technique is used in professional acquisition boards. the only problem is the velocity of the optoisolators. Another method is to use two diodes in series and a resistor: the signal flow through the resistor and one diode has the Anode connected to the resistor and the cathode to VCC, the other diode has the anode to GND an the other to the resistor. The mid point is connected to the input stage.

Lollo

 

[Kripton2035]

in the elektor of this month, they describe a 40Mhz logic analyser and they say that even in professionnals ones there are no protection, because they involve distortion and delays. so for some picoseconds of resolutions, it's nearly impossible to have any protection.
the inputs are directly connectd to fifo memories, so if you go over 5V, you can destroy them.

 

[CADDevil]

For example, the Tektronix used a proprietary chip in their probes for Tek1240/1241.

There was not an optoisolation, but their chip had a variable threshold point for various logic families and the output to the analyzer was a TTL level.