shainky
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hi,
I have a case where the scan stitching needs to be done between 2 async clock domains. I know that we need negative latches as lockup latches when we stitch two posedge triggered flops from asynch clock domains. My question is, for this particular case in the figure, is the hold time meeting for the capture clock? 1,2,3 represent the time when the negative level starts for the latch.
I have a case where the scan stitching needs to be done between 2 async clock domains. I know that we need negative latches as lockup latches when we stitch two posedge triggered flops from asynch clock domains. My question is, for this particular case in the figure, is the hold time meeting for the capture clock? 1,2,3 represent the time when the negative level starts for the latch.