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Significance of Global Skew is it finds out the delay of the clock tree in such a way that it removes the setup violation as well as Hold violation. In this context, we have to use skew balancing to get the required slack.
good point to discuss, generally even a cts algoritham quality is estimated on the basis of the global skew, but i dont get why it is of importance, if a local skew b'wen adjusant registers is small that will help in timing
No idea why global skew is of any importance at all...
Local skew should be generally minimized, or sometimes could be increased for a too slow path between two registers. And skew between registers driving synchronous output should be generally minimized? Is that correct? Is there any situation where global skew matters at all?
In my opinion, if you are working on a chip (flat design), the global skew is not important if you can close timing, especially for hold.
Buf if you are working on a block and it is a full chip clock domain, the global skew will make effect at full chip timing for global clock balance. You need to meet the latency &. skew requirements for chip timing close.