Jun 24, 2014 #1 R ramprabhu27 Newbie level 1 Joined Sep 27, 2013 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 5 I am implementing an abstract machine in hardware using VHDL. The abstract machine consists of registers which points to linked lists in RAM.So I want to know how to implement linked lists in VHDL and are they synthesizable?
I am implementing an abstract machine in hardware using VHDL. The abstract machine consists of registers which points to linked lists in RAM.So I want to know how to implement linked lists in VHDL and are they synthesizable?