Re: probe pad limitation
Probe pads take up lots of die area, so they increase the cost of the chip. If you were designing a chip for production, your boss would be angry if you had excessive probe pads.
Additionally, the probe pads do have substantial substrate capacitance (and it's usually not modeled), typically in the ballpark of 1pF. So, if you have a high frequency but high impedance signal attached to a probe pad, it might be attenuated so much that it's rendered unusable. Or, if you have a probe pad attached to a low-impedance node (such as the source of a MOSFET) while its gate is varied at high frequency, the probe pad will cause lots of current to be dumped through the MOSFET --potentially into a high impedance node, causing erratic behavior.
Hope this helps.