Let's discuss this real-world opamp

[tomandrosea]

Hi every one :
I have some questions about the op-amp in the attachment file .
My questions are :
1. What is the gain of every stage
2. What is the polse and zeros
3. How to calculate its slew rate
4. What is the function of N3 P2
5. How to ensure the opamp is stable with 500PF cap load

 

[lavitaebelle]

Re: an analysis of opamp , need you help

This is a 3 stage amplifier with class AB control loop and nested miller compensation.

1. What is the gain of every stage
Gain of first stage=gm1(rin2||R1) (gm1=Ic/Vt,rin2=βVt/Ic)
Gain of second stage=gm2ro2 (ro2 is the cascode impedance seen at nodes E and F)
Gain of third stage=gmN4.rout when NMOS is active and gmP3rout when PMOS is active (rout is the output impedance of the final stage).

2. What is the polse and zeros
There are 4 poles-input of input diff pair, input to second stage input diff pair, output of second stage folded cascode stage and output of final output stage.
The only high impedance node among the first three poles is the output of the folded cascode. Hence there needs to be some pole splitting for compensation. C3,R9 and C3,R8 do the job.
There is an additional nested compensation present in the form of C2 and R8.

3. How to calculate its slew rate
I am not sure but I think it is I1/C2+I2/C3

4. What is the function of N3 P2
They are part of the class AB control loop. They determine bias to nodes E and F and are responsible to fix minimum current in the output stage during class AB operation.

5. How to ensure the opamp is stable with 500PF cap load
Do proper pole splitting using the present compensation. Make use of the zeros.

 

[tomandrosea]

Re: an analysis of opamp , need you help

This is a 3 stage amplifier with class AB control loop and nested miller compensation.

1. What is the gain of every stage
Gain of first stage=gm1(rin2||R1) (gm1=Ic/Vt,rin2=βVt/Ic)
Gain of second stage=gm2ro2 (ro2 is the cascode impedance seen at nodes E and F)
Gain of third stage=gmN4.rout when NMOS is active and gmP3rout when PMOS is active (rout is the output impedance of the final stage).

2. What is the polse and zeros
There are 4 poles-input of input diff pair, input to second stage input diff pair, output of second stage folded cascode stage and output of final output stage.
The only high impedance node among the first three poles is the output of the folded cascode. Hence there needs to be some pole splitting for compensation.
C3,R9 and C3,R8 do the job.
There is an additional nested compensation present in the form of C2 and R8.

3. How to calculate its slew rate
I am not sure but I think it is I1/C2+I2/C3

4. What is the function of N3 P2
They are part of the class AB control loop. They determine bias to nodes E and F and are responsible to fix minimum current in the output stage during class AB operation.

5. How to ensure the opamp is stable with 500PF cap load
Do proper pole splitting using the present compensation. Make use of the zeros.

I am soryy , I didn't give the enough information

Ra ,Re,Rout are the output r of node A ,E ,Out ...
Ra ≈ R1 = 17k
Re= Rf=1meg ( ?? )
Rout = 100k
Gq1=Gq2 =150u
Gq3=Gq4 = 210u
Gp3=0.7m Gn4=0.8m


1. The second stage gain is ?
A2 = Gq3 * ( (R2+R3) / (1/Gq7+R2+R3) ) * Rf
The term of (R2 +R3) / (R2 +R3+1/Gq7) is current divider ,for R2 and R3 is not high enough and 1/Gq7 , 1/Gq8 is not low enough .
A3 = (Gp3 + Gn4) * Rout

2.
The poles is ?
P1= 1 / (R1 * A2 * A3 * C2)
P2 = 1/ (R1 * C1)
P3= ? P4=?
"Hence there needs to be some pole splitting for compensation.
C3,R9 and C3,R8 do the job. "
I don't know 'pole splitting' , so May you say more about pole spllitting . And Why C3 ,R9 , R8 are not pole
splitting for the output node the 3rd stage .
Should the first zero be equal to the second pole ?


3. The slew rate ?

4. N3 and P2 is to increase the transfer rate for the high Cap at
node E and F by positive feedback .

5. May you be good enough to say more about the 5rd question ?

 

[lavitaebelle]

an analysis of opamp , need you help

Pole splitting is basically moving the poles as far away from each other as possible to keep the amplifier stable when a negative feedback loop is closed around the amplifier.(compensation is essentially pole splitting). The zeros can be used to cancel the higher poles in the amplifier.

for qn 5. The output pole is defined by the output load capacitance and the output resistance. Knowing the pole, The other significant pole, which is at the output of the folded cascode is pushed lower by addition of the compensation cap. The value of the cap depends on how much the pole needs to be pushed. In other terms it depends on how much phase margin is expected out of the amplifier.

You can find about compensation/pole splitting in any analog electronics book. You can find info about nested miller compensation in papers and books by Johan Huising.

 

[tomandrosea]

Re: an analysis of opamp , need you help

Thanks for your information . But is there someone can give me some
advice about the other questions ?

Added after 21 minutes:

This op amp is a classic real-world circuit , and I think it is worth your
time to analysis .

Added after 3 minutes:

It is a very classic op-amp product

 

[tomandrosea]

Re: an analysis of opamp , need you help

I think there are many people with great design excercise here , but why
no one gave me some clue about my puzzle

Added after 1 hours 48 minutes:

I am waiting for some advices .

 

[tomandrosea]

Is there someone can help me ? I am still waiting for some expert to
give me answers

 

[tomandrosea]

Why there is no body help me ? Is this question too easy or too hard ?

Added after 5 hours 11 minutes:

I still want to discuss this op-amp with someone

 

[willyboy19]

It is indeed an interesing opamp. One thing I noticed here is the role of P2 and N3: they indeed form a positive feedback with Q8, R2, R3, N3 and R7 loop. With proper amount of this positive feedback, very high impedance at E and F nodes can be obtained which makes this opamp very high gain and also eases the pole-splitting compensation.

Also R8, C2 forms a nest-miller compensation as suggested by someone already. It is interesting to check the value of R1 and C1: they form a pole here for compensation purose as well. But I haven't gone thru the math and can not see clearly why they should be there.

Do you have bias current level and R, C values within this circuit? It may help for further analysis.

 

[tandr]

the current source I1 =10u
I2 = 20u
Icq7 = Icq8=15u
Idp3 =Idn4 =100u
R6 =R7 =60 k
R2 = 7 k
R3 = 100
question 1 :
As you have said , this op-amp uses nested Miller compensation ,
but what's the function of C1 . Wheather the pole of C1 will decrease
the bandwidth . So why the C1 is there ?
How to calculate the poles and zeros by hand ?

question 2 :
You said the positive feedback increase the gain . So what is the
loop gain and how to calculate the gain of this stage , and how
to simulate it ?
question 3 :
What 's the main effect of Mp2 MN3 R6, R7 , to increase
the gain or to increase the transfer rate for the high gate capicitance
of output stage 's MOS transistor .
How the positive feedback change when one of the 'floating voltage source '
transistor MN2 /MP1 shut off under large voltage swing .

question 4 :
How to calculate the slew rate by hand ? And wheather the positive feedback
effect it ?

 

[tandr]

What is your result about the gain of this op-amp