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Leakage inductance in Flyback transformer spec?

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cupoftea

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Hi,
Why is it that when a transformer manufacturer gives you a spec for a flyback transformer, they always ONLY give you the leakage inductance as seen from the pri, with sec shorted?

In a Flyback SMPS, its important to know what is the primary leakage inductance on its own. So why do they never give this figure?
For example, in the following attached flyback transformer, the leakage seen from the pri, with sec shorted is 24uH. However, the component of leakage in the pri is 11.8uH.

The 11.8uH is the crucial figure needed, because it is needed in the 0.5.L.I^2.f equation to calculate the power dissipation associated with the dissipation of that leakage inductance energy….which pertains to the voltage seen on the primary side clamp/snubber resistor……which is crucial since it shows whether your fet dies from overvoltage or not.

Leakage in flyback transformer.jpg
 

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  • LEAKAGE in flyback transformer.zip
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Inductive transformer behaviour can be fully characterized by three parameters, e.g. L1, L2 and k in LTSpice model. Separate primary and secondary leakage exist in a physical model but aren't observable.
 
Thanks, and may you agree that in the above case, the leakage inductance figure that matters, for the purposes of calculating the power to be dissipated by the primary clamp is 11.8uH, even though the measured leakage inductance was (correctly) 24uH?
 

they always ONLY give you the leakage inductance as seen from the pri, with sec shorted?
Likely because in normal operation the secondary is connected to some low impedance load, not open, which is the worst case.
 
In LTspice, you can change K L3 L4 0.99, the mutual ration between coils.
You know that, in transformer model. L_leak is not mean serial inductor L_ser as you inserted in Ltspice. You worked and design with LLC, same calculate form was built also. Normally, L_leak ~= L_ser, so for quickly estimate, often measure L_leak by short secondary coil.
L_leak is problem of hard switching flyback converter, need to optimize duty_max/ I_peak, R_sr of coil, size & layer of primary and secondary.
L_leak is use to calculate how much energy need to dissipate on Clamp, like RCD, or TVS. It is only to estimate spike voltage on switcher. Why ? Spike voltage can reduce by slow down or make longer time when turn off. That mean lost energy share more to switcher instead of Clamp. And will reduce EMI also, because dv/dt reduce.
My experiment:
40W, 23uH short secondary, Vin 400Vdc, Vout 28-40Vdc, Mosfet TO220 can run without heating. If optimize EMI by turn on/off time, need 2W heatsink. The better PQ2625 transformer I known that is only 11uH, after change and calculate I wound myself, reduce to 13uH-15uH base on EE28 over 5 samples.
PQxx core is most suitable for flyback transformer.
 
for a reasonably symmetrically made transformer, you can divide the leakage by the turns ratio squared

and split into pri and sec

However in real life you see all the leakage when the fet turns off.
 
I think the leakage inductance should refer to the total name of the three main causes: coil interlayer coupling leakage, magnetic core coupling leakage and magnetic core material eddy current. Even the position of the inductance where the magnetic core air gap is located will affect the leakage inductance. Therefore, the clamp circuit parameters should be subject to the limit value test on the basis of the calculated value, and then determined.
 
Respectfully, none of these things;

" magnetic core coupling leakage and magnetic core material eddy current. Even the position of the inductance where the magnetic core air gap is located will affect the leakage inductance. "

affect leakage inductance, with the exception of lead-out wires draped near the core surface
 
Respectfully, none of these things;

" magnetic core coupling leakage and magnetic core material eddy current. Even the position of the inductance where the magnetic core air gap is located will affect the leakage inductance. "

affect leakage inductance, with the exception of lead-out wires draped near the core surface
Yes, the line outside the coupler is a bigger source of leakage.
 
Inductive transformer behaviour can be fully characterized by three parameters, e.g. L1, L2 and k in LTSpice model. Separate primary and secondary leakage exist in a physical model but aren't observable.
This is really the key point. Splitting the leakage inductance between primary and secondary sides is silly, and results in an overdefined model with more than three parameters. The overdefined model is, at best, equivalent to the real black box model. If you don't derive the overdefined model correctly, then you end up with a wrong model which doesn't match the real thing.

For simulation, the most convenient set of parameters is Lp, Ls, and K. K can't really be measured directly, but it can be calculated by measuring the short circuit inductance, which is easy to measure.
 

Splitting the leakage inductance between primary and secondary sides is silly,
Thanks, the txformer shown in #1 is the only way of doing it that shows 24uH as being "seen" from the primary side with sec shorted. If i put a inductance of 24uH in the pri, then thats not correct, and the thing wont look like 24uH with sec shorted.
I need it to be exact so i can see the overvoltage ringing on sec diode and pri RCD clamp.

If i do it with K factor, then K is an approximation with loads of different formulas for it.....i know Llk = LP (1-K^2) but many texts disagree with that.

I am a bit baffled that the RCD Clamp losses should use the 24uH figure......the primary current only flows in the primary component of leakage inductance....the sec is effectively open circuit when the primary conducts.....but do you mean the crosssover time when both pri and sec conduct for the short interval at FET switch off?
 

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