LDOs are pretty fussy about the qualities of their output
filter capacitor. You may get better results by going to (N)
smaller caps since ESL and ESR both reduce in parallel.
You should size bulk capacitance to ride out any transient
load current step with less than the tolerable deflection,
figuring in the time it would take the control loop to re-settle.
Q=Istep*tsettle
C=Vstep*Q
But the bulk capacitance has to be supplemented by "fast"
(low ESL/ESR) capacitors as well, to ride out the edges.