With respect to the impedance you should aim for constant conitions i.e. trace width, trace to trace spacing, GND below and GND between the traces or no GND at all. Every deviation will lead to a change of the target impedance. In generell I would recommend to keep GND planes between the individual diff-pairs, thlo shield them from each other. Here, spatial seperation is favourable.
Based on the pictures atteched, I miss VIAs to connect the individual GND layers, but I only see a snippet and it may not be feasible to but additional VIAs.
With respect to te return GND path. Check if there is an uninterrupted GND path from IC #1 to IC #2, next)most likely ubder the diff-lines. Here the return current will leave/enter by a GND pin of the ICs.