I am using the CMOS technology from AMS. it supporting me with four metal layers. except metal 4, I have metal1 and metal 2 and metal 3 having the same via and contact Dimensions. my question is there any different physical properties between them ? I see people are avoiding using higher metalization layers but I don't know why . I only thinking that because metal 3 for example have a deeper via then it has higher contact resistance but I am not sure nor I don't know if might make a difference
in my technology, the top metal layer Metal 4 has big via and contact width, therefore in my circuit I used metal 1 for the VDD and GND as any other connection, this is again a question, why should the power rails be the top layer ?
For routing power to the cells, it has to be done in M1 (the lowest metal). These are called rails. For distributing the power across the chip you will use rings and stripes, typically in the highest metal. In your case, that is M4.